1. Field
The embodiments discussed herein relate to a receiver circuit.
2. Description of Related Art
In signal transmission between circuit blocks, various elements, such as chips, enclosures, a plurality of buffers, and amplifier circuits may be arranged on a signal transmission path. Offsets generated due to variations in voltages and currents caused by variations in elements in the buffers may be detected or adjusted by an offset compensation circuit.
Related art technologies are disclosed in Japanese Patent No. 4081018, Japanese Laid-open Patent Publication No. S63-078386, and Japanese Laid-open Patent Publication No. H01-110265, for example.